Yet another VFC compilation error post

[praetor242]

I'm trying to create a VFO for my Dell E1909W, which is 1440x900@60, but when I compile my vfs file (https://gist.github.com/gwfisher/de68192da33eeec0d03a692837902ea5 it gives me the following errors (https://gist.github.com/gwfisher/76b8487a0d96db12bb80ee666225c2be. No clue why. I've pulled the EDID info from the monitor and also used Arachnoid's modeling calculator, which spit out similar values to the EDID. I think this is a fairly generic monitor. But not sure why it's not compiling. I've been at it all day HALP!

[GRudolf94]

It seems to me that you made a mistake down below in the file. For that resolution there are 934 lines total, and 900 active ones, but, if I understood the VFC manpage correctly, shouldn't, in line 51 of your VFS, it be written "repeat 900" instead of "repeat 1050"? That tries to generate sync for more lines than there are on each frame...

I could be very wrong, though, I'm just a noob.

[praetor242]

Sounds reasonable. Lemme try it.

[praetor242]

And that worked Thanks!!!

[GRudolf94]

Glad to help!

[praetor242]

It still glitches when it does 3D graphics though :\ Need to tweak things I guess. Not sure what to tweak. It's a V6 board, and those are touchy.

[GRudolf94]

106MHz should be within the allowable pixel clock for v6. It should glitch out at above 109. But anyway, look into making a reduced blanking mode, that'll reduce the pixel clock and should work ok.

[praetor242]

Yeah. The guide I'm following recommends that, so I'm going to fidget with it and see if I can't get it to work right.