IPX and EDO memory

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dreadbit
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IPX and EDO memory

Unread postby dreadbit » Sun Jan 21, 2018 12:47 pm

Hello,
I've plugged non-ecc non-parity EDO SIMMs into IPX and know what? It complains "replace system board", drops me to command prompt, allows to 'boot cdrom' and boots NetBSD from SCSI CD.
I wonder what will happen if I cut pin 66 on SIMMs (which are grounded, indicating that's EDO simm).

Did anyone investigate this?
HP 9000: E25/B160/180/A500/C8000; SUN: IPX/Ultra2/5/Blade100/Blade150; IBM RS/6000 7043/240; Mac Beige/iMac G3; Robotron PC1715/M; C=128; UKNC; Atari 1040STE

robespierre
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Re: IPX and EDO memory

Unread postby robespierre » Sun Jan 21, 2018 12:57 pm

Sun workstations require parity memory. Pin 66 is certainly not even wired to the socket.
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dreadbit
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Re: IPX and EDO memory

Unread postby dreadbit » Mon Jan 29, 2018 1:19 pm

Thanks, I see, the mystic is that it works at all with parity-less memory, not with edo.

More, saying `words` in OpenBoot 2.9 prompt, I see disable-33-bit-mode and enable-33-bit-mode words, but OpenBoot Command Reference 801-7042 knows nothing about them.

Is that somehow related? Or, well, what's that?
HP 9000: E25/B160/180/A500/C8000; SUN: IPX/Ultra2/5/Blade100/Blade150; IBM RS/6000 7043/240; Mac Beige/iMac G3; Robotron PC1715/M; C=128; UKNC; Atari 1040STE

robespierre
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Re: IPX and EDO memory

Unread postby robespierre » Mon Jan 29, 2018 2:13 pm

There were simms that were only 33 bits wide (1 parity bit per word), instead of the normal 36 bits wide (1 parity bit per byte). That saved on dram chips, because the chips for parity needed to be x1 (less dense). A 36 bit simm needed 4 parity chips per bank, since it had 4 byte select lines. A 33 bit simm only needs 1 parity chip per bank, but it won't work if the host expects to do byte-wide accesses with parity.
My guess is that 33-bit-mode disables byte-wide accesses and forces only word accesses to be used. Generally byte-wide access is only needed for uncached read/write or narrow I/O DMA devices, which isn't very often.
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kjaer
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Re: IPX and EDO memory

Unread postby kjaer » Mon Jan 29, 2018 3:42 pm

Correct, re: byte-wide vs. word-wide parity. SPARCstation 5 memory is definitely set up this way. I'm not sure about the IPX though.
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