Challenge L, 6*R4x00, 1GB, HIPPI

A place to post hardware inventories.
Forum rules
Please post your 'hinv' in the following format:

Topic: Kind of machine (O2, Octane, Tezro, Onyx2, etc.), CPU (R10k 250MHz, R12k 300MHz, R16k 1GHz, etc.), RAM, graphics option (Example: Tezro V12 4xR16K 700MHz 4GB)

Body: output of hinv -v (hinv -vm if possible) and /usr/gfx/gfxinfo.

Please wrap the output in BBCode "code" blocks to improve legibility.
User avatar
jan-jaap
Donor
Donor
Posts: 4867
Joined: Thu Jun 17, 2004 11:35 am
Location: Wijchen, The Netherlands
Contact:

Challenge L, 6*R4x00, 1GB, HIPPI

Unread postby jan-jaap » Tue Feb 02, 2010 2:59 pm

Picked up last weekend:

Code: Select all

IRIS 1# hinv
Processor 0: 250 MHZ IP19
CPU: MIPS R4400 Processor Chip Revision: 6.0
FPU: MIPS R4000 Floating Point Coprocessor Revision: 0.0
Processor 1: 250 MHZ IP19
CPU: MIPS R4400 Processor Chip Revision: 6.0
FPU: MIPS R4000 Floating Point Coprocessor Revision: 0.0
Processor 2: 250 MHZ IP19
CPU: MIPS R4400 Processor Chip Revision: 6.0
FPU: MIPS R4000 Floating Point Coprocessor Revision: 0.0
Processor 3: 250 MHZ IP19
CPU: MIPS R4400 Processor Chip Revision: 6.0
FPU: MIPS R4000 Floating Point Coprocessor Revision: 0.0
Processor 4: 100 MHZ IP19
CPU: MIPS R4400 Processor Chip Revision: 4.0
FPU: MIPS R4000 Floating Point Coprocessor Revision: 0.0
Processor 5: 100 MHZ IP19
CPU: MIPS R4400 Processor Chip Revision: 4.0
FPU: MIPS R4000 Floating Point Coprocessor Revision: 0.0
Secondary unified instruction/data cache size: 4 Mbytes
Secondary unified instruction/data cache size: 4 Mbytes
Secondary unified instruction/data cache size: 4 Mbytes
Secondary unified instruction/data cache size: 4 Mbytes
Secondary unified instruction/data cache size: 1 Mbyte
Secondary unified instruction/data cache size: 1 Mbyte
Data cache size: 16 Kbytes
Instruction cache size: 16 Kbytes
Main memory size: 1024 Mbytes, 2-way interleaved
I/O board, Ebus slot 5: IO4 revision 1
Integral EPC serial ports: 4
Integral Ethernet controller: et0, Ebus slot 5
EPC external interrupts
Integral SCSI controller 4: Version WD33C95A, differential, revision 1
Integral SCSI controller 3: Version WD33C95A, differential, revision 1
Integral SCSI controller 2: Version WD33C95A, differential, revision 1
Integral SCSI controller 1: Version WD33C95A, differential, revision 0
  Disk drive: unit 1 on SCSI controller 1
Integral SCSI controller 0: Version WD33C95A, single ended, revision 0
  CDROM: unit 4 on SCSI controller 0
HIPPI adapter: hippi0, slot 5 adap 6, firmware version 27161144
Integral EPC parallel port: Ebus slot 5
VME bus: adapter 0 mapped to adapter 21
VME bus: adapter 21
IRIS 2#


I picked up a Challenge DM as well. When I'm done with this box it will have 12*R10000 w. 2MB L2 and 2GB RAM. So this is a work in progress. I rearranged the RAM a bit to improve interleaving, and to get some confidence wanted to run the diagnostics. I get:

Code: Select all

IRIS login: diag
Password:
IRIX Release 6.2 IP19 IRIS
Copyright 1987-1996 Silicon Graphics, Inc. All Rights Reserved.
Last login: Tue Feb  2 13:28:21 PST 2010 on ttyd1
TERM = (vt100)
CPU: MIPS R4400 Processor Chip Revision: 4.0
CPU: MIPS R4400 Processor Chip Revision: 4.0
*********************************************************************
*** DETECTED DOWNLEVEL 100 Mhz R4400 PROCESSOR CHIP REVISION: 4.0 ***
***  ON THIS SYSTEM WHICH NEED TO BE UPDATED.                     ***
*** PLEASE LOGIN AS ROOT AND EXECUTE HINV TO SEE WHICH PROCESSORS ***
***  ARE DOWNLEVEL AND UPDATE THOSE PROCESSORS.                   ***
*********************************************************************

:roll:

There's a HIPPI board installed, I was wondering why it was in a 'wrong' slot (not VME) until I put it in the right slot -- and now the front doesn't close anymore :?
Last edited by jan-jaap on Wed Feb 03, 2010 1:05 am, edited 1 time in total.
:PI: :Indigo: :Indigo: :Indy: :Indy: :Indy: :Indigo2: :Indigo2: :Indigo2IMP: :Octane: :Octane2: :O2: :O2+: Image :Fuel: :Tezro: :4D70G: :Skywriter: :PWRSeries: :Crimson: :ChallengeL: :Onyx: :O200: :Onyx2: :O3x02L:
To accentuate the special identity of the IRIS 4D/70, Silicon Graphics' designers selected a new color palette. The machine's coating blends dark grey, raspberry and beige colors into a pleasing harmony. (IRIS 4D/70 Superworkstation Technical Report)

User avatar
zackwatt
Posts: 460
Joined: Sun Mar 01, 2009 9:53 am
Location: Kentucky

Re: Challenge L, 6*R4x00, 1GB, HIPPI

Unread postby zackwatt » Tue Feb 02, 2010 3:28 pm

Pics Please!
:Octane2: :Octane2: :Octane: :Indigo2IMP: :Indigo2: :O2: :O2+:

Octane2 2x600 V12 8GB
- Octane2 600 V12 2GB - Octane 2x400 V10 2GB
Indigo² 195 Max Impact 386MB - Indigo² 250 Extreme 386MB
O2 350 CRM 256MB - O2+ 400 CRM 512MB

"I'm totally unappreciated in my time. You can run this whole park from this room, with minimal staff, for up to three days. You think that kind of automation is easy? Or cheap? You know anybody who can network eight Connection Machines and de-bug two million lines of code for what I bid this job? Because if you can, I'd love to see him try."

User avatar
Indyboy
Posts: 233
Joined: Tue Nov 21, 2006 9:05 am
Location: Lost in EU

Re: Challenge L, 6*R4x00, 1GB, HIPPI

Unread postby Indyboy » Wed Feb 03, 2010 3:23 am

Is it possible to use more than 4 cpus (1 nodeboard) in a Challenge DM? :shock:
:O200: :Indigo: :O2: :Indigo2IMP:

User avatar
josehill
Moderator
Moderator
Posts: 3295
Joined: Mon Jun 06, 2005 9:53 pm
Location: New England, USA
Contact:

Re: Challenge L, 6*R4x00, 1GB, HIPPI

Unread postby josehill » Wed Feb 03, 2010 3:58 am

Indyboy wrote:Is it possible to use more than 4 cpus (1 nodeboard) in a Challenge DM? :shock:
I think jan-jaap was talking about getting the Challenge L up to 12 cpus. A Challenge DM can only go up to four cpus.

User avatar
jan-jaap
Donor
Donor
Posts: 4867
Joined: Thu Jun 17, 2004 11:35 am
Location: Wijchen, The Netherlands
Contact:

Re: Challenge L, 6*R4x00, 1GB, HIPPI

Unread postby jan-jaap » Wed Feb 03, 2010 4:15 am

josehill wrote:
Indyboy wrote:Is it possible to use more than 4 cpus (1 nodeboard) in a Challenge DM? :shock:
I think jan-jaap was talking about getting the Challenge L up to 12 cpus. A Challenge DM can only go up to four cpus.

Indeed. My intention is to transform the 'L' into the ultimate build system for old IRIX versions: running IRIX 5.3 with 12 R4400's or IRIX 6.2 with 12 * R10K's (with 2MB L2!). I already had two quad R10K IP25's, one in my Onyx, one as a spare. Now, with the 'DM' I got number three. In the 'L' was a quad 250MHz IP19, and again I had one already plus a quad 200MHz.

I'm currently just taking inventory of what I picked up, what works and what not, board revisions etc. Tonight I'll pull the 'downrev' IP19 and run diagnostics on this system, them I'll move on to the DM.

I'm kind of curious where the built-in limitation (single CPU board) of the DM is hiding -- backplane? system controller?

I have no intention to keep both systems around. If someone wants the Challenge DM, I can probably create a working system from the dual CPU board. Otherwise I'll dismantle it and keep all the power bricks, system controller and boards as spares / donors.
:PI: :Indigo: :Indigo: :Indy: :Indy: :Indy: :Indigo2: :Indigo2: :Indigo2IMP: :Octane: :Octane2: :O2: :O2+: Image :Fuel: :Tezro: :4D70G: :Skywriter: :PWRSeries: :Crimson: :ChallengeL: :Onyx: :O200: :Onyx2: :O3x02L:
To accentuate the special identity of the IRIS 4D/70, Silicon Graphics' designers selected a new color palette. The machine's coating blends dark grey, raspberry and beige colors into a pleasing harmony. (IRIS 4D/70 Superworkstation Technical Report)

User avatar
jan-jaap
Donor
Donor
Posts: 4867
Joined: Thu Jun 17, 2004 11:35 am
Location: Wijchen, The Netherlands
Contact:

Re: Challenge L, 6*R4x00, 1GB, HIPPI

Unread postby jan-jaap » Wed Feb 03, 2010 12:01 pm

zackwatt wrote:Pics Please!

I took off the skins before transporting it, I will clean them before I put them back on. I just put the front door on so my 15 month old son doesn't hurt himself on the sheet metal. Not that he cares about it, there are no buttons to press or beeping noises :mrgreen:
Attachments
challengeL.jpg
:PI: :Indigo: :Indigo: :Indy: :Indy: :Indy: :Indigo2: :Indigo2: :Indigo2IMP: :Octane: :Octane2: :O2: :O2+: Image :Fuel: :Tezro: :4D70G: :Skywriter: :PWRSeries: :Crimson: :ChallengeL: :Onyx: :O200: :Onyx2: :O3x02L:
To accentuate the special identity of the IRIS 4D/70, Silicon Graphics' designers selected a new color palette. The machine's coating blends dark grey, raspberry and beige colors into a pleasing harmony. (IRIS 4D/70 Superworkstation Technical Report)

User avatar
Indyboy
Posts: 233
Joined: Tue Nov 21, 2006 9:05 am
Location: Lost in EU

Re: Challenge L, 6*R4x00, 1GB, HIPPI

Unread postby Indyboy » Wed Feb 03, 2010 2:14 pm

I've managed to understand jan-jaap's sentences right after sending the comment :oops: and decided not to touch my comment in hope that some interesting info will pop up :mrgreen: Sorry for the pollution :)
:O200: :Indigo: :O2: :Indigo2IMP:

User avatar
jan-jaap
Donor
Donor
Posts: 4867
Joined: Thu Jun 17, 2004 11:35 am
Location: Wijchen, The Netherlands
Contact:

Re: Challenge L, 6*R4x00, 1GB, HIPPI

Unread postby jan-jaap » Thu Feb 04, 2010 2:37 pm

The Challenge DM is also back! It has two IO4's; I had to swap them because the NVRAM on the primary has died and this freaks out the system.

Code: Select all

IRIS 1# hinv -v
CPU Board at Slot 2: (Enabled)
  Processor 0 at Slot 2/Slice 0: 194 Mhz R10000 with 2 MB secondary cache (Enabled)
  Processor 1 at Slot 2/Slice 1: 194 Mhz R10000 with 2 MB secondary cache (Enabled)
  Processor 2 at Slot 2/Slice 2: 194 Mhz R10000 with 2 MB secondary cache (Enabled)
  Processor 3 at Slot 2/Slice 3: 194 Mhz R10000 with 2 MB secondary cache (Enabled)
CPU: MIPS R10000 Processor Chip Revision: 2.6
FPU: MIPS R10010 Floating Point Chip Revision: 0.0
Secondary unified instruction/data cache size: 2 Mbytes
Data cache size: 32 Kbytes
Instruction cache size: 32 Kbytes
Main memory size: 1024 Mbytes, 4-way interleaved
MC3 Memory Board at Slot 1: 512 MB of memory (Enabled)
  Bank A contains 16 MB SIMMS (Enabled)
  Bank B contains 16 MB SIMMS (Enabled)
  Bank C contains 16 MB SIMMS (Enabled)
  Bank D contains 16 MB SIMMS (Enabled)
  Bank E contains 16 MB SIMMS (Enabled)
  Bank F contains 16 MB SIMMS (Enabled)
  Bank G contains 16 MB SIMMS (Enabled)
  Bank H contains 16 MB SIMMS (Enabled)
MC3 Memory Board at Slot 3: 512 MB of memory (Enabled)
  Bank A contains 16 MB SIMMS (Enabled)
  Bank B contains 16 MB SIMMS (Enabled)
  Bank C contains 16 MB SIMMS (Enabled)
  Bank D contains 16 MB SIMMS (Enabled)
  Bank E contains 16 MB SIMMS (Enabled)
  Bank F contains 16 MB SIMMS (Enabled)
  Bank G contains 16 MB SIMMS (Enabled)
  Bank H contains 16 MB SIMMS (Enabled)
I/O board, Ebus slot 4: IO4 revision 1
I/O board, Ebus slot 5: IO4 revision 1
Integral EPC serial ports: 4
Integral Ethernet controller: et0, Ebus slot 5
EPC external interrupts
Integral SCSI controller 41: Version WD33C95A, differential, revision 0
Integral SCSI controller 40: Version WD33C95A, differential, revision 0
Integral SCSI controller 1: Version WD33C95A, differential, revision 0
  Disk drive: unit 1 on SCSI controller 1
Integral SCSI controller 0: Version WD33C95A, single ended, revision 0
  CDROM: unit 4 on SCSI controller 0
Integral SCSI controller 44: Version SCIP/WD33C95A, differential
Integral SCSI controller 43: Version SCIP/WD33C95A, differential
Integral SCSI controller 42: Version SCIP/WD33C95A, differential
CC synchronization join counter
Integral EPC parallel port: Ebus slot 4
Integral EPC parallel port: Ebus slot 5
VME bus: adapter 0 mapped to adapter 21
VME bus: adapter 21
IRIS 2#


Next, I'm going to install a second IP25. This should fail on a genuine DM, but I cannot find any difference between the system controllers of the DM and the L The L booted fine with the system controller of the DM, with 8 CPUs installed ...
:PI: :Indigo: :Indigo: :Indy: :Indy: :Indy: :Indigo2: :Indigo2: :Indigo2IMP: :Octane: :Octane2: :O2: :O2+: Image :Fuel: :Tezro: :4D70G: :Skywriter: :PWRSeries: :Crimson: :ChallengeL: :Onyx: :O200: :Onyx2: :O3x02L:
To accentuate the special identity of the IRIS 4D/70, Silicon Graphics' designers selected a new color palette. The machine's coating blends dark grey, raspberry and beige colors into a pleasing harmony. (IRIS 4D/70 Superworkstation Technical Report)

User avatar
jan-jaap
Donor
Donor
Posts: 4867
Joined: Thu Jun 17, 2004 11:35 am
Location: Wijchen, The Netherlands
Contact:

Re: Challenge L, 6*R4x00, 1GB, HIPPI

Unread postby jan-jaap » Fri Feb 05, 2010 12:28 pm

Booted the 'DM' with a second IP25 this evening, and got:

Code: Select all

>> hinv -b

System Bus Information:
   Slot 1: MC3 memory board with 512 megabytes of memory (Enabled)
   Slot 2: IP25 processor board with 4 cpus (Enabled)
   Slot 3: IP25 processor board with 0 cpus (Enabled)
   Slot 4: IO4 I/O peripheral controller board (Enabled)
   Slot 5: IO4 I/O peripheral controller board (Enabled)


The '0 cpus' raised my blood pressure for a moment (as did the B+++ text on the LCD), but it turns out both IP25's work fine as long as they are in slot 2.

Guess I have to look again at what limits the DM ... but I have many other things to do so this project will be suspended for a short while.

Oh, and I tried again with the system controller of the Challenge L -- same result. Will have to inspect the backplane ...
:PI: :Indigo: :Indigo: :Indy: :Indy: :Indy: :Indigo2: :Indigo2: :Indigo2IMP: :Octane: :Octane2: :O2: :O2+: Image :Fuel: :Tezro: :4D70G: :Skywriter: :PWRSeries: :Crimson: :ChallengeL: :Onyx: :O200: :Onyx2: :O3x02L:
To accentuate the special identity of the IRIS 4D/70, Silicon Graphics' designers selected a new color palette. The machine's coating blends dark grey, raspberry and beige colors into a pleasing harmony. (IRIS 4D/70 Superworkstation Technical Report)

User avatar
Indyboy
Posts: 233
Joined: Tue Nov 21, 2006 9:05 am
Location: Lost in EU

Re: Challenge L, 6*R4x00, 1GB, HIPPI

Unread postby Indyboy » Sat Feb 06, 2010 3:11 pm

Thanks for your time and devotion! I'm eagerly waiting for your next observations or solutions for this problem. It'd to be nice to build a 16 proc system :mrgreen:
:O200: :Indigo: :O2: :Indigo2IMP:

User avatar
jan-jaap
Donor
Donor
Posts: 4867
Joined: Thu Jun 17, 2004 11:35 am
Location: Wijchen, The Netherlands
Contact:

Re: Challenge L, 6*R4x00, 1GB, HIPPI

Unread postby jan-jaap » Sun Feb 07, 2010 11:59 am

Indyboy wrote:Thanks for your time and devotion! I'm eagerly waiting for your next observations or solutions for this problem. It'd to be nice to build a 16 proc system :mrgreen:

Not possible, at least not in a deskside. Only 5 E-bus slots, and you need at least one for memory, and one for I/O. So max is 3 CPU boards. I'll have to settle for 12 * R10K 8-) But they will be the 2MB L2 model.
:PI: :Indigo: :Indigo: :Indy: :Indy: :Indy: :Indigo2: :Indigo2: :Indigo2IMP: :Octane: :Octane2: :O2: :O2+: Image :Fuel: :Tezro: :4D70G: :Skywriter: :PWRSeries: :Crimson: :ChallengeL: :Onyx: :O200: :Onyx2: :O3x02L:
To accentuate the special identity of the IRIS 4D/70, Silicon Graphics' designers selected a new color palette. The machine's coating blends dark grey, raspberry and beige colors into a pleasing harmony. (IRIS 4D/70 Superworkstation Technical Report)

User avatar
josehill
Moderator
Moderator
Posts: 3295
Joined: Mon Jun 06, 2005 9:53 pm
Location: New England, USA
Contact:

Re: Challenge L, 6*R4x00, 1GB, HIPPI

Unread postby josehill » Sun Feb 07, 2010 2:40 pm

Yep, you need a Challenge XL refrigerator, um, rack, to go past 12 cpus.

lunatic
Posts: 42
Joined: Fri Jan 21, 2005 3:07 am
Location: Heidelberg, Germany
Contact:

Re: Challenge L, 6*R4x00, 1GB, HIPPI

Unread postby lunatic » Mon Feb 08, 2010 2:25 pm

rumors are, that there is a screw on the backplane present on the DM that disables all but one ebus slot for CPU boards...
That said, I do have a DM running with more than one CPU board. I just can't say why it works, because I got it in that configuration.
Don't suffer from insanity...
Enjoy every minute of it.

User avatar
Indyboy
Posts: 233
Joined: Tue Nov 21, 2006 9:05 am
Location: Lost in EU

Re: Challenge L, 6*R4x00, 1GB, HIPPI

Unread postby Indyboy » Tue Feb 09, 2010 11:19 pm

jan-jaap wrote:
Indyboy wrote:Thanks for your time and devotion! I'm eagerly waiting for your next observations or solutions for this problem. It'd to be nice to build a 16 proc system :mrgreen:

Not possible, at least not in a deskside. Only 5 E-bus slots, and you need at least one for memory, and one for I/O. So max is 3 CPU boards. I'll have to settle for 12 * R10K 8-) But they will be the 2MB L2 model.

OK, my bad, I've had 12 proc system on my mind :) According to lunatic it's possible so I'm really excited how it could be done.
:O200: :Indigo: :O2: :Indigo2IMP:

User avatar
jan-jaap
Donor
Donor
Posts: 4867
Joined: Thu Jun 17, 2004 11:35 am
Location: Wijchen, The Netherlands
Contact:

Re: Challenge L, 6*R4x00, 1GB, HIPPI

Unread postby jan-jaap » Wed Feb 10, 2010 2:06 am

Indyboy wrote:According to lunatic it's possible so I'm really excited how it could be done.

Me too. It's just a curiosity thing; I have both the L and the DM sitting here so this is the perfect occasion.

I could simply install the R10K boards in the Challenge L and call it quits but that wouldn't be satisfying. I need to know how things work and how to hack them :)
:PI: :Indigo: :Indigo: :Indy: :Indy: :Indy: :Indigo2: :Indigo2: :Indigo2IMP: :Octane: :Octane2: :O2: :O2+: Image :Fuel: :Tezro: :4D70G: :Skywriter: :PWRSeries: :Crimson: :ChallengeL: :Onyx: :O200: :Onyx2: :O3x02L:
To accentuate the special identity of the IRIS 4D/70, Silicon Graphics' designers selected a new color palette. The machine's coating blends dark grey, raspberry and beige colors into a pleasing harmony. (IRIS 4D/70 Superworkstation Technical Report)


Return to “SGI: hinv”

Who is online

Users browsing this forum: No registered users and 1 guest